Tag Archive: ISSCC

Apr 01

Micron’s Resistive Memory Roadmap

At this year’s ISSCC, there was no update from the Micron/Sony collaboration which had presented a 27nm technology 16Gb Cu CBRAM chip last year. However, there are some tantalizing titbits in their latest (2015) Winter……

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Dec 31

Meetings of Interest to the ReRAM/CBRAM Community


Latest Update, 10/3/15: 8th IMW, 7th NVMW, IEDM 2015, Advances in ReRAM: Materials & Interfaces
If you are aware of an upcoming meeting or conference, please post a comment or contact the moderator.

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Jan 29

Crystal Ball Gazing

It’s that time of year again… Time to dust off that ol’ crystal ball and gaze into the murky depths and come up with the ReRAM-Forum predictions for the rest of 2014!

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Apr 18

More from Panasonic


At the 2013 ISSCC, Panasonic presented a very detailed paper on improving ReRAM endurance (specifically forming and writing) in the same session as the Toshiba/SanDisk 32Gb chip (paper 12.1). The paper presents an ReRAM analysis based on the oxidation/reduction (redox) mechanism of filament rupture and formation. The authors point to two techniques as critical in …

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Mar 05

ISSCC 2013 Revisited


It’s already being referred to as simply “Paper 12.1” from this year’s 60th edition of the ISSCC in San Francisco. Paper 12.1 is of course the Toshiba/SanDisk paper describing a bilayer 32Gbit ReRAM chip. Unfortunately I was not at the conference. A few details of the paper have emerged and some colleagues have been kind …

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Feb 18

ISSCC 2013

The International Solid State Circuits Conference is taking place this week at the San Francisco Marriott Marquis Hotel and celebrating its 60th anniversary. As part of the conference, the organizers provide a yearly update on Memory Trends, this year’s update being provided by Kevin Zhang of Intel, OR. His update includes the more traditional memory …

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