Feb 12

Update on CeRAM and Acronyms

Following last month’s post here on CeRAM being developed by Symetrix Corporation, various stories have appeared indicating that ARM is interested in the technology. These trace back to a Blog post over at EETimes which is referenced by the News section of the Symetrix Corporation web site. The EETImes Blog post by Ron Neale is worth a read as are the comments including responses from Symetrix Chairman, Professor Carlos Paz de Araujo. The post includes an announcement attributed to Symetrix that “ARM is evaluating CeRAM technology as part of its strategy in embedded nonvolatile memory offerings and their discussions with Symetrix started over three months ago….” although I couldn’t find the announcement on the Symetrix site. Nonetheless, this certainly makes sense given ARM’s strength in low power technology.

The rest of the EETimes article gives a technical introduction and description of CeRAM along with some IV data. I hate to be picky but there are some slightly odd aspects to the article beyond it apparently being the source of a company announcement. For example, the first of the IV curves (as are some of the other figures) is labelled as copyright which I have never seen before for technical data from another entity. On this plot the compliance/transition current is given as 3×10^-3 A/sq cm (3mA/cm^2). This is incredibly low! And would correspond to 30pA for a 1 square micron device. The figure contains two insets describing the transition current for smaller devices. For a 100nm square device the transition current corresponds to a current density of some 6 orders of magnitude higher than the main figure. (For a 20nm square device it is only 5 orders of magnitude greater). To be fair, the Symetrix Corporation website has some non copyrighted data (see slide 3, part of which is shown below) showing compliance/transition currents between 100 and 1000 A/cm^2 (~5 orders of magnitude greater) so maybe this is a typo at work.

Symetrix are clear that they have only worked on relatively large devices (many square microns) to date. However, since June last year they have had a co-development program underway at the University of Texas at Dallas which presumably will address array development and further miniaturization. Hopefully the fruits of this collaboration will soon see the light of day.

Like many folks, I use Google to (try and) keep track of my interests including what is happening in emerging memory technology. This works well for the acronyms ReRAM and CBRAM but not so well for CeRAM (try a search!). However, I have just been alerted to another ‘ReRAM’, namely the Royal Enfield Riders Association of Meghalaya as a result of their stand against racism. Apologies to any of their members who have ended up here by mistake!

Christie Marrian, ReRAM-Forum Moderator and bicycle, only, rider

1 comment

  1. admin

    Clarification from Carlos Paz de Araujo, Symetrix Corporation.
    The copyrighted drawings are from the author, not Symetrix. And the 3E-3A/cm2 is a typo in the (EETimes) article. the correct figure is 3E3 A/cm2. The author received disclosures similar to the web site and general information on device physics and the Correlate Electron phenomenon – but his article is solely his own. We do not see anything wrong with his description, albeit, it was done for the general public and not a specialist.

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