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Nov 07

NCCAVS Advanced Memory Meeting: Full Program

NCCAVS Thin Film Users Group

Advanced Memory Meeting

Tuesday, Nov 12, 2013

MEETING SPONSORED BY: Evans Analytical Group

Talks beginning at 1 PM, (Free Pizza at approximately 12:30 PM)

*FREE, No Registration Needed, Just Show Up!*

Semi Global Headquarters, Seminar Rooms 1 & 2
3081 Zanker Rd., San Jose, CA
**Park in SEMI Global Parking Lots ONLY**

This seminar focuses on emerging memory technologies and advances in existing memory technologies.  The purpose of this seminar is to bring together leading researchers in academia and industry with innovative technologists to nurture a free exchange of triumphs and challenges in the advances in memory technologies.

Co-Chairs:

Chakku Gopalan,, Adesto Technologies, [email protected]

Charitha Perera, [email protected]

Michael Oye, Advanced Studies Laboratories (ASL) and Dept. of Electrical Engineering, University of California Santa Cruz, [email protected]

AGENDA

1PM: Introductions

1:05PM-1:35PM

Non-Volatile Memory Technology for Computing Applications: Directions beyond NAND Flash, Bob Gleixner, Micron

Over the past decade, the memory hierarchy for computing devices has evolved to include NAND flash-based memory in addition to DRAM and hard disk drives. This inclusion was enabled by significant cost reduction as the NAND cell was scaled to 20 nm and the ability to store multiple data bits per physical cell was achieved. While not as aggressive, DRAM has followed a similar scaling path to sub-30 nm devices. As  further scaling has become increasingly challenging for both of these technologies, a number of alternative non-volatile memories are being investigated to either provide a scaling path or enable new types of system level memory. This talk will first discuss the performance and cost requirements for a new technology to add significant value in computing devices. It will then consider the status and challenges of four emerging memory candidates – PCM, RRAM, STT-MRAM, and FERAM – to either replace or displace NAND and DRAM in computing applications.

Bob Gleixner is a Distinguished Member of Technical Staff with Micron’s Process Research and Development team in San Jose, CA. He received his B.S. degree from Cornell University and his M.S and Ph.D. degrees from Stanford University, all in Materials Science and Engineering. He joined Intel’s logic technology group in 1998and for the next 10 years focused on reliability of semiconductor logic, memory, and microdisplay devices. In 2004 he started working on phase change memory, leading the reliability team that released the first high-density production product in 2010. In 2008 he joined Numonyx (a spin-off from Intel and ST Micro) and in 2010 joined Micron Technologies as part of the Numonyx acquisition. Bob continues to work on emerging non-volatile memory technologies with a focus on understanding, modeling, and improving performance and reliability to achieve production-capable devices.

1:40PM – 2:10PM

Modeling aspects of forming and switching in RRAM devices, including possible doping effects for improved characteristics, Blanka Magyari-Kope, Stanford University

Binary transition metal oxides TiOx, NiOx, HfOx, AlOx, TaOx have been recently proposed as possible materials for embedded non-volatile memory modules. Currently, a major bottleneck in determining the scalability, retention and endurance of these devices, is the lack of detailed understanding of the resistive switching mechanism. Filamentary models for transition metal oxides had been widely adopted experimentally and investigated theoretically. Recently, ab initio methodologies had been employed to asses the  formation energy implications of a conductive filament channel formation corresponding to the “ON” state LRS, followed by atomistic descriptions of the rupturing/dissolution process into the “OFF” state of the memory operation with HRS characteristics. In order to achieve desired device characteristics, preferential impurity doping in these types of systems has been proposed to favorably affect and control the “ON” – “OFF” transition process. In addition, based on quantum mechanical calculations, electron and hole trapping effects were shown to have a significant role in the switching process under applied electrical field.  While hole injection into oxygen reduced transition metal oxide with a formed filament can favor the dissolution process, electron injection induces filament formation. 

Blanka Magyari-Köpe received her Ph.D. degree in physics from the Royal Institute of Technology, Stockholm, Sweden, in 2003. She is currently a Senior Research Engineer in the Department of Electrical Engineering at Stanford University. Her research focuses on understanding the RRAM switching mechanism, and on the atomic control of nanointerfaces between metallic, insulating, and semiconducting materials. She has given over 30 invited talks and published more than 50 scientific papers.

2:15PM-2:45PM

Interfacial Engineering in ReRAMs based on Strongly Correlated Electron Systems, Seshubabu Desu, 4DS

Resistive random access memories based on strongly correlated electron systems  are emerging as strong candidates for the next generation  non-volatile memories  due to their low power operation, high endurance and long data retention.  Our results confirm that these memories can be scaled down to several generations with improved program performance. The memory materials were deposited by our proprietary vapor deposition technique with excellent control of crystallinity, stoichiometry, pinhole density, and film thickness uniformity at temperatures that are compatible with the back-end-of-line (BOEL) CMOS process.   The memory structures can be stacked in the 3-rd dimension to increase the memory density. Our detailed and extensive investigations of switching mechanism indicate that it is not filamentary based. Our work demonstrates that the switching mechanism is based on barrier height variations induced by the migration of oxygen vacancies across the junction coupled with change of oxidation states of cations in the oxide layer.

Break….

3PM-3:30PM

How Flash Memory is changing our lives, Itzik Gilboa, Sandisk

Flash memory has had a remarkable transformational effect on the way we consume and store data. This talk will offer a look into the key attributes of the technology that enabled it to become the dominant non-volatile memory solution in the market today as well as review the forces that will be driving the Flash memory market space in the next few years.

Yitzhak (Itzik) E. Gilboa, Senior Director, Captive Memory Joint Venture, SanDisk Corporation, is a member of the board of directors of the SanDisk and Toshiba flash memory joint ventures since 2007. As a member of the board, Mr. Gilboa is responsible for oversight of the joint ventures business plans and participated in the negotiations to form the most recent joint venture with Toshiba, which was formed in July of 2010.  In addition to his role as board member, Mr. Gilboa manages the supply of  memory devices to SanDisk from the joint ventures operations, as well as maintaining a long-range forecast of worldwide flash memory supply. Prior to joining SanDisk in 2006, Mr. Gilboa worked at Cypress Semiconductor as Director of Technology Development and then as Director of Foundry Operations. During his tenure at Cypress, Mr. Gilboa helped develop four generations of manufacturing technology for the production of SRAM (Static Random Access Memory) devices.  Mr. Gilboa holds various patents in the area of semiconductor manufacturing processes.

3:35PM-4:05PM

XPS + LE-XRF Thin Film Metrology, Wei Ti Lee, ReVera Inc.

Overview of the only inline X-ray photoelectron spectroscopy (XPS) metrology used to control film thickness and composition in high-k metal gate (HKMG) logic foundries and advanced memory fabs. Description of a unique thin film control method combining XPS with a low-energy XRF (LE-XRF). Discussion of current XPS applications in HKMG and memory, and emerging applications enabled by the LE-XRF enhancement.

Wei Ti Lee received his his Ph.D degree in Chemical Engineering from the University of Illinois at Urbana-Champaign in 1997. He was with Applied Materials, Santa Clara, CA, for 13 years from 1997 to 2010, developing advanced CVD and PVD metal deposition process and equipment for the semiconductor industry. He later worked at Adesto Technologies for 2½ years, developing the next generation CBRAM process technology. In late 2012, he joined ReVera Inc as a Senior Applications Technologist, applying XPS metrology to control and monitor ultra thin films for future technology nodes. Dr. Lee holds 8 US patents.

4:10PM – 4:40PM

Methodologies to Study the Scalability and Physics of Phase-Change Memory devices, Rakesh Jeyasingh, Stanford University

Recent advances in new materials, device technologies and circuits have made many emerging memories attractive candidates for a new generation of memories. Phase change memory is one such candidate that has advanced to manufacturing and deployment in practical applications. This talk gives an overview of our recent works in phase change memory. We propose an on-chip heater and  temperature sensor (the Micro Thermal Stage) with the phase change memory to characterize the threshold switching, crystallization, drift, and thermoelectric properties of phase change memory up to the melting temperature and down to hundreds of nanoseconds time scale that is much closer to the operating regimes of practical phase change memories. We demonstrate the scalability of phase change materials to dimensions < 5nm using nanoparticle synthesis methods.  A highly scaled (<2nm) functional PCM cross-point device using carbon nanotube as the electrode is fabricated proving the scalability of PCM devices to ultra small dimensions.

2 comments

  1. Chakku

    Thank you Chirstie..

  2. admin

    Presentations now available online: http://www.avsusergroups.org/tfug/tfug2013_11proceedings.htm

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