I had an interesting chat with David Eggleston, Principal, Intuitive Cognition Consulting*, about last month’s Flash Memory Summit (FMS) in Santa Clara, CA. Dave organized the couple of ‘new technologies’ sessions (more on this in a subsequent Blog) and participated in a ‘what comes next’ panel (more on that later too). The attendance at FMS was up ~30% from last year which is pretty impressive in these days of more or less continuous conferences. Why? Good question! Dave put this added interest down to the acceptance that Flash is now a fully paid up member of the storage pantheon. While SSDs have been around in laptops and tablets for some time, Flash is now considered an integral part of enterprise performance SSDs.
But it doesn’t end there. One of the FMS highlights was the demonstration of how Flash has been introduced into faster memory channels, i.e. the DIMM sockets you probably have populated with DRAM on the motherboard of your desktop. Servers have many DIMM sockets and apparently only one has to be actually populated with DRAM. Up to now, Flash has been used in DIMM sockets to back up DRAM when a power outage is sensed. The new development is to introduce Flash as an actively used memory with access times far faster than possible with a SSD. The trick is to hide the Flash limitations as working memory behind a controller which interfaces the memory with the rest of the system. Dave refers to this as virtualization in that the actual memory performance characteristics are no longer the concern of the system as they are dealt with by the controller.
Looking further out one can see that it is no longer essential to have a homogeneous memory technology behind the controller and one can mix and match depending on price and performance at any given time. One can do this as logic is so much faster than even the best working memories that there are plenty of clock ticks available for the controller to do its stuff. See above from an IBM presentation by Jung Yoon at FMS. This has an important consequence for ReRAM/CBRAM (and other emerging memories) as it not necessary to be a 1:1 replacement for existing memory and performance enhancements can readily be passed on to the system.
The really big news at FMS was Samsung’s announcement of not just Vertical (3D) NAND manufacturing but also a product (SSD) incorporating 3D NAND chips. A lot of people, not least Samsung’s competitors, were amazed by this development as 3D NAND was believed to be a few years away. 3D is seen as a way to continue NAND scaling, i.e. reduce the cost per bit, by all the big 4 NAND producers. Indeed SanDisk/Toshiba were quite clear about this by pointedly repeating their position from May that 3D NAND is “targeted to provide meaningful cost reduction versus 1Z” (their sub 19nm and possibly last, planar, 2D NAND) and don’t see their 3D NAND appearing until 2016. Samsung have taken an almost opposite tack by pushing 3D NAND as giving a performance enhancement over planar (2x faster and an impressive 10x improvement in endurance) and are pricing their 3D NAND at a higher cost per bit than planar. From Samsung’s presentation!
Christie Marrian, ReRAM-Forum moderator with a big thank you to David Eggleston *who can be contacted at [email protected]