The International Memory Workshop (IMW 2013) takes place this week in Monterey CA*. This is 5th IMW although the conference can trace its roots through the Non-Volatile Semiconductor Memory Workshops back to 1976. Spread over three days, the conference has some 53 presentations which the website points out were selected from over 80 submissions. IMW has always had a strong focus on ‘what comes next’ technology and these days this means a lot of the technical program is dedicated to ReRAM and CBRAM. In fact the conference starts on Sunday with a one day tutorial on ReRAM. which covers applications, reliability, selector devices, materials and mechanisms feature speakers from industry, government labs and academia. Certainly on (virtual) paper, this looks to be a thoroughly well balanced set of talks and an excellent introduction to ReRAM.
The conference proper starts on Monday, May 27th with some invited talks including one from my old boss’s new boss on charge trap (as opposed to floating gate) Flash memory. I’ve been out of that loop for three years and my old company tended to avoid presentations at technical conferences (for various perfectly valid reasons) so it will be interesting to hear what the latest ‘Advancement’ is. ReRAM focus starts in the afternoon with the first of four (and a bit) sessions devoted on resistive switching. The first two of four IMEC presentations are in this session and should prove very interesting and they are one of the few institutions who have the wherewithal to perform advanced scaling and materials studies of ReRAM cells and arrays. On the material front Hafnium oxide is the most mentioned ReRAM material judging by the paper titles. Second is Tantalum oxide which is a little strange seeing that TaOx appears to material of choice in most of the ‘closer to product’ announcements and papers that have appeared over the past year or so.
A short break from ReRAM is available at the Monday evening panel session which will look at the prospects and future for MRAM (and newer versions thereof). Power dissipation (first) and scalability (second) seem to be the key hurdles for the technology although one should not overlook manufacturability as some of the cell structures that I have seen in the literature are complex requiring multiple ultra-thin layers that need to be defined at close to minimum feature sizes.
Reliability is the focus of the second ReRAM session on Tuesday morning. An interesting session is in prospect: all the contributors (Sematech, Samsung, IMEC and Chou University in Japan) have worked extensively in the field. Professor Ken Takeuchi (Chuo University) who is listed as session moderator has done important work on quantifying the benefits of ReRAM at the system level so hopefully there will be more on this topic. The third ReRAM session on Wednesday morning (the organizers clearly don’t want to let the ReRAM community oversleep) has a more mechanistic focus with three of the four papers from Academia. CBRAM is spelt out in at least three papers including one from Altis Semiconductor who now offer embedded CBRAM as part of their 130nm low power platform. Finally the ‘and a bit’ session which is a reference to the penultimate talk of the conference and fourth IMEC paper on 3D ReRAM.
I’ve visited Monterey many times and would like to point out that the Aquarium is well worth a visit if you have the time. On my last visit, we went on a ‘behind the scenes’ tour which was full of amusing anecdotes and background on the exhibits and people involved in running the Aquarium.
Christie Marrian, ReRAM-Forum Moderator
*Full IMW 2013 program is available at: www.ewh.ieee.org/soc/eds/imw/Documents/IMW2013_Program_final.pdf