Mar 27

Rad Hard?

A group in Argentina is studying ReRAM for use in harsh environments such as space and satellites based on the premise that the technology will have superior radiation hardness to conventional non-volatile memory, i.e. it inherently “Rad Hard”. The program is entitled MemoSat (MEMO stands for Memory Mechanisms in Oxides) and headed by Dr Pablo Levy and is sponsored by a number of national organizations such as CONICET and CNEA. The project even has a video dating from 2010 when the project was awarded the DuPont-CONICET Award. Unfortunately my language skills are not up to summarizing the content further.* The group has been working in the field for some time and has published several papers in the scientific literature. Unfortunately, I couldn’t find any details of Rad Hard measurements but the premise seems reasonable, at first thought anyway.

The effect of exposure to energetic radiation are multiple but can be broadly categorized into lattice displacement (atoms are displaced from their lattice positions changing the underlying properties of the material) and ionization (the passage of the particle creates hole electron pairs in the chip). The latter tend to be transient but more prevalent. MRAM has long been considered a Rad Hard technology as the memory storage mechanism is not susceptible to ionizing radiation. Of course the control circuitry associated with the memory will be susceptible to radiation. However, Rad Hard electronics utilize a number of techniques to reduce the effect of high energy radiation experienced in high altitude and space applications. They are mainly to do with the way the chip is manufactured and packaged as well as software. These products are all readily available, although at a premium in terms of cost per bit. Also the technology used tends to lags non-Rad Hard products by ~10 years or so.

So is ReRAM inherently Rad Hard? I’m not an expert but I can quite see that ReRAM/CBRAM will be less susceptible to ionizing radiation impact in a part of the chip adjacent the ReRAM cell. For Flash/DRAM the ionizing radiation can create threshold shifts due to charge buildup even if the actual storage cell is not impacted. However, the ReRAM cell itself could be impacted by lattice displacement radiation. However, the cell is typically thin so the damage cross section will be minimized. As mentioned above, there a number of well established techniques for reducing the effect of the energetic particles and radiation that result in lattice displacement through the choice of packaging and substrate material. Ionizing radiation, I would guess, would be more of a problem in read out where a transient could cause a bit to be mis-read. But this is a problem that all Rad Hard memories (and logic, for that matter) so is not unique to ReRAM.

Nonetheless it would be good to see some measurements!

Christie Marrian, www.ReRAM-Forum.com Moderator

*If anybody can provide a transcript, I’ll add to the Blog. If one of the authors gives the ok, I’ll add the video to the Blog

ps Happy Holi and Easter to one and all!


  1. admin

    Erica DeIonno (Aerospace), Hugh Barnaby (ASU), and I have recognized the rad-hard potential of the memristor and have been investigating it for the past 6 years. Below are two of our papers, with one more in press. “Impact of alpha particles on the electrical characteristics of TiO2 memristors,” H.J. Barnaby, S. Malley, M. Land, S. Charnicki, A. Kathuria, B. Wilkens, E. DeIonno, W. M. Tong, IEEE Trans. Nucl. Sci., 58(6), (2011), 2838-44. “Radiation hardness of TiO2 memristive switches,” W. M. Tong, J. J. Yang, P. Kuekes, D. R. Stewart, R. S. Williams, E. DeIonno, E. King, S. Wiczak, J. V. Osborn, IEEE Trans. Nucl. Sci., 52 (3), (2010), 1640-1643.
    Many thankls Will!

  2. S. TIRANO

    May I complete the post with this paper :

    “Highly Stable Radiation-Hardened Resistive-Switching Memory”, Wang, Yan ; Hangbing Lv; Wang, Wei; Liu, Qi; Long, Shibing; Qin Wang; Zongliang Huo; Sen Zhang; Yingtao Li; Qingyun Zuo; Wentai Lian; Jianhong Yang; Liu, Ming, IEEE Elec. Dev. Lett., 31 (12), 1470 – 1472

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