Sep 30

IEDM 2012

Updated October 2nd. The technical program for IEDM 2012 in San Francisco has recently been published. www.his.com/~iedm/program/2012_techprogram.pdf. By my count there are 18 papers on various aspects of ReRAM/CBRAM technology. Further, these papers are not just in sessions devoted to ReRAM or Memory Technology sessions but also sessions devoted to Modeling, Reliability, and Design. In addition there is a plenary talk and evening session where I am sure the topic will come up. While this is about the same number as 2011, it is still an impressive. The papers are moving away from material based studies to more detailed cell structure and modeling/reliability issues. Hafnium oxide seems to be the material of choice for many of the papers although there is more diversity in architecture and selection device. All look interesting. It is worth noting the IEDM has a low acceptance rate (the lowest acceptance rate of the conferences that I used to try attend regularly) so the program is almost always an excellent representation of the state-of-the-art across the electronics device field.

Highlights? Well the RRAM memory technology session for one (although I couldn’t help but notice that the RRAM II occurs some 24hrs before RRAM I!) The session includes papers from Samsung, IMEC, and SEMATECH as well as a number of prominent University groups so looks to be very geographically comprehensive. The two talks in the Reliability session also look intriguing and it is good to hear that folks are getting traction on this type of issue. Similarly for the Modeling papers. There are three papers describing ReRAM/CBRAM in “Neuromorphic Systems”. I can’t say I know much about the topic although it looks a bit like what used to be called ‘Neural Networks’. The name change is a definite improvement.

Update. I missed the paper from the Tsing-Hua University/TSMC collaboration on Contact RRAM first time around but it has created a certain interest. The paper describes fabricating a RRAM cell in a contact via of a 28nm Logic process. Sounds exciting for embedded applications, although I don’t understand how it can be realised without any additional masking/process steps as claimed. But definitely a session to attend on Wednesday afternoon!

Finally, there is a Panel Session on Tuesday evening on “Will Future Non-Volatile-Memory Contenders Disrupt NAND” where the panel will be asked a few key questions. I couldn’t resist including my responses as follows. Longer than we currently think, No, See previous question, Eventually, but will take longer than we currently think, Embedded, ReRAM, No. It promises to be a lively and hopefully thought provoking session.

The 2012 IEDM takes place December 10-12, 2012, at the Hilton Union Square in San Francisco, CA with Short Courses and Tutorials starting on December 8
San Francisco, CA

Christie Marrian, www.ReRAM-Forum.com Moderator

Add Comment Register

Leave a Reply

Your email address will not be published. Required fields are marked *

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <strike> <strong>