In doing some digging in preparation for the start of www.ReRAM-Forum.com, it became increasingly obvious that the technology is approaching a ‘tipping point’. While NAND Flash continues is relentless march down Moore’s law, more and more often one hears that the end of downscaling (at least in 2D) is in sight. Multi-layered (3D) approaches will no doubt gain a few more generations and I wouldn’t be surprised if ways to store an extra bit (or two) per cell will be worked out. Of course 3D (and multi-bit) is equally applicable to ReRAM/CBRAM. In fact one might argue that multi layer approaches will prove to be less complex for ReRAM/CBRAM. Nonetheless, the challenges of manufacturing multiple layers of active devices at close to minimum dimensions are many, complex and not to be underestimated. However, the good news for the ReRAM/CBRAM community is that the considerable ingenuity and innovative powers of the thousands of engineers working on NAND Flash will be working on these issues over the next few years. If they can’t come up with a yielding (i.e. profitable) approach, it is probably safe to say that multi layered approaches are not feasible.
The question the ReRAM/CBRAM community faces right now is how to get one’s ‘foot in the door’ to start developing and exercising manufacturing technology for volume applications and get samples and products to customers. The main NAND Flash suppliers will no doubt be working on and keeping close tabs on the technology. However, they will only go so far in terms of internal resource allocation to develop and manufacture samples of products that will potentially compete with their existing products.
On the other hand, a BEOL solution for embedded non-volatile memory seems attractive as one can minimize the changes needed to the FEOL manufacturing flow. Along these lines, Panasonic recently announced a micro-controller with an ReRAM memory could be available next year. More taxing because of the amounts of memory required is the ‘acoustic co-processor’ recently announced by my former employer, Spansion. Voice recognition is database search intensive so the more (non-volatile) memory type embedded with a processor, the better the performance! While I’ve no knowledge of the form of the acoustic co-processor except that it uses NOR Flash, a system on a chip (SoC) will almost always win out over a system in a package (SiP) for the same amounts of CPU horsepower and memory.
Christie Marrian, www.ReRAM-Forum.com moderator