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May 30

Integrating CBRAM

Today’s main stream NVM technologies for both discrete and embedded applications require operational conditions that are incompatible with modern low voltage logic CMOS designs. One of the promising technologies being developed for next generation non-volatile memory is the Conductive Bridging Random Access Memory (CBRAM) which utilizes the reversible switching of an electro-resistive dielectric between two conductive states as means of storing data. CBRAM offers superior performance in terms of Cell structure, process compatibility, bit cell and macro areas, scalability, currents (standby and active), operational time , cost and manufacturing backend turnaround time. With its relatively simple integration scheme, CBRAM technology can be introduced into any logic or memory technology process flows. Adesto has successfully demonstrated CBRAM insertion in 180nm Al BEOL (test chip) and 130nm Cu BEOL (Product). CBRAM technology is very flexible as material choices, process conditions, and electrical signals can modulate the performance.

The CBRAM module consists of 4 elements, the bottom electrode, the solid electrolyte, the top electrode and the barrier. The bottom electrode is required to be an electrochemically inert material. Tungsten (W) is a good choice for this layer as W-plugs which are typically used as interconnects between two metal levels. TaN or other Cu BEOL friendly electrodes can also be used as the bottom electrode. CBRAM technology is very flexible as material choices, process conditions, and electrical signals can modulate the performance.

The solid electrolyte is a thin film which switches between two (or many for MLC) conducting states based on electrochemical redox reactions of certain metal ions (anode material). Many different solid electrolytes are available and CBRAM technology offers the flexibility that materials can be chosen depending on the customer need (speed, reliability etc). The anode typically consists of electrochemically active materials such as Ag or Cu. The barrier material which encapsulates the CBRAM stack can be any standard dielectric barrier used in Cu BEOL technologies. All of the layers for the CBRAM stack can be processed using industry standard manufacturing tools thus enabling a seamless integration in mainstream CMOS technologies.

Adesto has demonstrated the CBRAM performance such as low operational voltage (<1V), low operational current (uA), ultra fast switching (<100ns) and excellent data retention. They have also shown that the insertion of CBRAM does not affect the CMOS layers. These unique features make CBRAM technology an ideal alternative for embedded memory [1].

For more details on this technology search CBRAM on the web or visit http://www.adestotech.com/

[1] C. Gopalan, Y. Ma, T. Gallo, J. Wang, E. Runnion, J. Saenz, F. Koushan, P. Blanchard, S. Hollmer, Demonstration of Conductive Bridging Random Access Memory (CBRAM) in logic CMOS process, Solid-State Electronics, Volume 58, Issue 1, April 2011, Pages 54-61, ISSN 0038-1101, 10.1016/j.sse.2010.11.024. (http://www.sciencedirect.com/science/article/pii/S0038110110004107)

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